In this tutorial we are going to simulate an NMOS Common-Source Amplifier with Enhancement Diode Load. As you all know, amplifiers are used to amplify an electrical signal to a desired value. In order to do this amplification we need to design the amplifier efficiently.
Gain of a Diode Load Amplifier can be adjusted by the width to length ratios of the two transistors. Lets have a look at the structure closely;
As can be seen from the figure on the right hand side, there are two transistors in these type of amplifiers. The output signal Vo is highly related to the input signal Vi and the parameters of these two transistors.
The Gain of this structure was calculated as;
You can have a look at the Magic Design of this structure on the right hand side. Also you can download the Magic Design from here.
In this example (W/L)1 was selected as 20 units and (W/L)2 was selected as 2 unit.
( W/L )1 = 40 / 2 = 20
( W/L )2 = 4 / 2 = 2
According to these ratios, AV is calculated theoretically as 3.162
The netlist used to simulate the amplifier is given below;
* SPICE3 file created from commonsource.ext - technology: scmos
*.option scale=1u
.model NMOS NMOS
.model PMOS PMOS
vdd5v vdd 0 5
Vin in 0 SINE(0.5 0.5 50 0 0 0 1000)
M1000 vdd vdd out 0 NMOS w=4 l=2
+ ad=52 pd=50 as=220 ps=108
M1001 out in 0 0 NMOS w=40 l=2
+ ad=0 pd=0 as=200 ps=90
C0 in 0 5.6fF
C1 out 0 3.0fF
C2 vdd 0 10.3fF
.lib C:\PROGRA~2\LTC\LTSPIC~1\lib\cmp\standard.mos
.tran 100ms
.backanno
.end
Simulation Results
We have finished the lesson 2 and simulated the amplifier structure which was drawn in Magic successfully using LTSpice IV.
I hope this tutorial is helpful. If you have any questions do not hesitate to ask! :)
keywords: tutorial, magic VLSI design
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